irq.h

00001 /******************************************************************************
00002  *   irq.h:  Interrupt related Header file for NXP LPC23xx/24xx Family 
00003  *   Microprocessors
00004  *
00005  *   Copyright(C) 2006, NXP Semiconductor
00006  *   All rights reserved.
00007  *
00008  *   History
00009  *   2006.09.01  ver 1.00    Prelimnary version, first Release
00010  *
00011  *   200?     Modified by mthomas.
00012  *   2008-9   Modified extensively by Ackley for the SFB project
00013  ******************************************************************************/
00014 #ifndef __IRQ_H 
00015 #define __IRQ_H
00016 
00017 #include "SFBTypes.h"           /* For IRQHandler */
00018 
00019 #ifdef __cplusplus
00020 extern "C" {
00021 #endif
00022 
00023 #define I_Bit                   0x80
00024 #define F_Bit                   0x40
00025 
00026 #define SYS32Mode               0x1F
00027 #define IRQ32Mode               0x12
00028 #define FIQ32Mode               0x11
00029 
00030 #define HIGHEST_PRIORITY        0x01
00031 #define HIGH_PRIORITY           0x04
00032 #define MEDIUM_PRIORITY         0x08
00033 #define LOW_PRIORITY            0x0C
00034 #define LOWEST_PRIORITY         0x0F
00035 
00036 #define WDT_INT                 0
00037 #define SWI_INT                 1
00038 #define ARM_CORE0_INT           2
00039 #define ARM_CORE1_INT           3
00040 #define TIMER0_INT              4
00041 #define TIMER1_INT              5
00042 #define UART0_INT               6
00043 #define UART1_INT               7
00044 #define PWM0_1_INT              8
00045 #define I2C0_INT                9
00046 #define SPI0_INT                10                      /* SPI and SSP0 share VIC slot */
00047 #define SSP0_INT                10
00048 #define SSP1_INT                11
00049 #define PLL_INT                 12
00050 #define RTC_INT                 13
00051 #define EINT0_INT               14
00052 #define EINT1_INT               15
00053 #define EINT2_INT               16
00054 #define EINT3_INT               17
00055 #define ADC0_INT                18
00056 #define I2C1_INT                19
00057 #define BOD_INT                 20
00058 #define EMAC_INT                21
00059 #define USB_INT                 22
00060 #define CAN_INT                 23
00061 #define MCI_INT                 24
00062 #define GPDMA_INT               25
00063 #define TIMER2_INT              26
00064 #define TIMER3_INT              27
00065 #define UART2_INT               28
00066 #define UART3_INT               29
00067 #define I2C2_INT                30
00068 #define I2S_INT                 31
00069 
00070 #define VIC_SIZE                32
00071 
00072 #define VECT_ADDR_INDEX 0x100
00073 #define VECT_CNTL_INDEX 0x200
00074 
00075 /* Be aware that, from compiler to compiler, nested interrupt will have to
00076 be handled differently. More details can be found in Philips LPC2000
00077 family app-note AN10381 */
00078  
00079 #include "SFBTypes.h"
00080 
00081 extern void init_VIC(void) ;
00082 
00083 u32 install_irq( u32 IntNumber, IRQHandler *HandlerAddr, u32 Priority );
00084 
00085 /* Mon Apr 13 05:22:01 2009 Ackley: Added for symmetry.  Disables interrupt, clears handler */
00086 u32 uninstall_irq( u32 IntNumber );
00087 
00088 #define enableInterrupts()                                                \
00089   __asm__ __volatile__ (                                                  \
00090                "MRS r0, CPSR\n\t"     /* Read status register */          \
00091                "BIC r0, r0, #0x80\n\t"/* Clear the I bit to allow IRQ */  \
00092                "MSR CPSR_c, r0"       /* Update status */                 \
00093                ::: "r0")              /* We clobbered r0 */
00094 extern void enableInterruptsFunction();
00095 
00096 #define disableInterrupts()                                               \
00097   __asm__ __volatile__ (                                                  \
00098                "MRS r0, CPSR\n\t"     /* Read status register */          \
00099                "ORR r0, r0, #0x80\n\t"/* Set the I bit to disallow IRQ */ \
00100                "MSR CPSR_c, r0"       /* Update status */                 \
00101                ::: "r0")              /* We clobbered r0 */
00102 extern void disableInterruptsFunction();
00103 
00104 #define suspendInterrupts(u32var)                                         \
00105   __asm__ __volatile__ (                                                  \
00106                "MRS %0, CPSR\n\t"     /* Read status register */          \
00107                "ORR r0, %0, #0x80\n\t"/* Set the I bit to disallow IRQ */ \
00108                "MSR CPSR_c, r0"       /* Update status */                 \
00109                : "=r" (u32var) : : "r0")  /* We clobbered r0 */
00110 
00111 #define restoreInterrupts(u32var)                                         \
00112   __asm__ __volatile__ (                                                  \
00113                "MSR CPSR_c, %0\n"     /* Restore status from supplied */  \
00114                : : "r" (u32var) : )
00115 
00116 
00117 #ifdef __cplusplus
00118 }
00119 #endif
00120 
00121 
00122 #endif /* end __IRQ_H */
00123 
00124 /******************************************************************************
00125 **                            End Of File
00126 ******************************************************************************/
00127 

Generated on Mon Oct 26 10:44:21 2009 for SFB by doxygen 1.5.9