# SFBHWPinsHost.h File Reference

Host-specific shims around pin definitions. More...

`#include "SFBTypes.h"`

Include dependency graph for SFBHWPinsHost.h:

Go to the source code of this file.

## Data Structures
class | SFBHWHostRegister
| An incomplete cut at host-side simulation of the SFB hardware registers. More...
class | SFBHWHostRegisterMap
| An incomplete cut at host-side simulation of the SFB hardware registers. More...
## Functions
u32 | micros ()
| The number of microseconds of uptime.
u32 | millis ()
| The number of milliseconds of uptime.
u64 | microseconds ()
| The number of microseconds of uptime.
u32 | milliseconds ()
| The number of milliseconds of uptime.
u32 | seconds ()
| The number of seconds of uptime.

## Detailed Description

Host-specific shims around pin definitions.

Author:
  David H. Ackley.

Date:
  (C) 2008 All rights reserved.

Code License:
  The GNU Lesser General Public License

License Note:
  All code samples shown in documentation are placed into the public domain.

## Function Documentation

u32 micros | ( |  | ) |

The number of microseconds of uptime.

Rolls over after about 70 minutes.

u64 microseconds | ( |  | ) |

The number of microseconds of uptime.

Rolls over after about a half a million years. microseconds() is quite fast, except for the overhead of dealing in `u64` size, and its value is exact, unaffected by interrupt load.

u32 millis | ( |  | ) |

The number of milliseconds of uptime.

Rolls over after about 49 days. millis() is much faster than milliseconds(), but is not as accurate; millis() may miss ticks due to interrupt load

u32 milliseconds | ( |  | ) |

The number of milliseconds of uptime.

Rolls over after about 180 years. milliseconds() is somewhat slow compared to millis(), because it performs a non-power-of-2 division, but its value is exact, unaffected by interrupt load.

u32 seconds | ( |  | ) |

The number of seconds of uptime.

Rolls over after about 180 years. seconds is somewhat slow (requires a division) but its value is exact, unaffected by interrupt load.